View AKD4145-A_7498385.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

[AKD4145-A] evaluation board rev.3 for ak4145 a kd4145- a general description the akd4145 is an evaluation board for the ak4145, btsc encoder wi th d/a converter, which is optimized for digital av application. the akd 4145 has the analog/digital audio interface and can achieve the interface with analog/digital audio system s via bnc/opt-connector. ? ordering guide AKD4145-A --- evaluation board for ak4145 (cable for connecting with printer port of ibm-at,compatible pc and control software are packed with this. this control soft ware does not support windows nt.) function ? adc with analog input ? dir with optical input ? 10pin header for digital audio i/f and serial control i/f opt in logic1 (3.3v) ak4145 (encoder) coax regulator composite audio serial control x?tal t1:5v=>3.3v t2:3.3v=>1.8v t3:12v=>5v video / 27m port2 dsp data port1 ak4114 (dir) ak5357 (adc) ainl ainr 12v 5v for op-amp logic2 (3.3v~1.8v) dgnd (0v) agnd (0v) avdd (3.3v) dvdd (1.8v) tvdd (3.3v~1.8v) for 74avc8t245 74hc14 74lvc07 ak4114 op-amp figure. 1 akd4145 block diagram * circuit diagram and pcb layout are attached at the end of this manual 2008/08 - 1 -
[AKD4145-A] evaluation board manual ? operation sequence 1) set up the power supply lines. (1-1) in case of using the regulator. set up the jumper pins. jp13 jp14 jp15 jp17 jp18 jp22 jp23 jp avdd-sel dvdd-sel tvdd-sel logic2-sel logic1-sel 5v-reg 3.3v-reg state reg(3.3v) reg(1.8v) reg(3.3v) tvdd reg(3.3v) short reg(3.3v) set up the power supply lines. [reg(12v)] (red) = +12v : for regulator and op-amp [reg(5v)] (red) = open : ?5v? is supplied from regulator (t3) [avdd] (orange) = open : ?3.3v? is supplied from regulator (t1) [dvdd] (orange) = open : ?1.8v? is supplied from regulator (t2) [tvdd] (orange) = open : ?3.3v? is supplied from regulator (t1) [logic1] (orange) = open : ?3.3v? is supplied from regulator (t1) [logic2] (orange) = open : ?3.3v? is supplied from regulator (t1) [agnd] (black) = 0v : analog ground [dgnd] (black) = 0v : digital ground (note) va and vd of ak5357 (adc) is supplied ?3.3v? from regulator (t1). (1-2) in case of using the power supply connectors. set up the jumper pins. jp13 jp14 jp15 jp17 jp18 jp22 jp23 jp avdd-sel dvdd-sel tvdd-sel logic2-sel logic1-sel 5v-reg 3.3v-reg state tm tm tm tm tm open tm set up the power supply lines. [reg(12v)] (red) = +12v : for op-amp [reg(5v)] (red) = +5v : for regulator (t1, t2) [avdd] (orange) = +2.7~3.6v : for avdd of ak4145 (typ. 3.3v) [dvdd] (orange) = +1.7~1.9v : for dvdd of ak4145 (typ. 1.8v) [tvdd] (orange) = +1.7~3.6v : for tvdd of ak4145 (typ. 3.3v) [logic1] (orange) = +2.7~3.6v : for logic (typ. 3.3v) [logic2] (orange) = +1.7~3.6v : for logic of i/f (typ. 3.3v : the voltage same as tvdd) [agnd] (black) = 0v : analog ground [dgnd] (black) = 0v : digital ground (note) va and vd of ak5357 (adc) is supplied ?3.3v? from regulator (t1). 2) set up the jumper pins and switches. (see the followings.) 3) power on. sw1 (ak4145), sw2 (adc) and sw3 (dir) should be reset once bringing toggle sw ?l? upon power-up. please refer to talble.1 on page.3 about setting of toggle sw. 2008/08 - 2 -
[AKD4145-A] ? setting of the toggle sw no. name function sw1 pdn-ak4145 pdn sw of ak4145 (u2). keep ?h? during normal operation. sw2 pdn-adc pdn sw of ak5357 (u1). keep ?h? during normal operation. keep ?l? when ak5357 is not used. sw3 pdn-dir pdn sw of ak4114 (u4). keep ?h? during normal operation. keep ?l? when ak4114 is not used. table. 1 setting of the toggle sw ? indication for led [led1] (int) : monitor int0 pin of the dir (ak4114). led turns on when pll of the ak4114 is unlocked. ? setting of jumper pins no name function 1 serial ak4145 control mode open : parallel control. short : serial control. 2 amp output of op-amp open : out of use. short : connected. 3 ca output of ca thr : out of use. amp : amplify ca with op-amp 4 i2s audio i/f of ak5357 (adc) open : 24bit msb justified. short : 24bit i 2 s compatible. 6 rx rx input of ak4114 (dir) opt : optical (port1). bnc : bnc rx (j6). 7 dif/scl selection of ak4145?s dif/scl pin dif: dif in parallel mode. scl:scl in serial mode. 8 fs/sda selection of ak4145?s fs/sda pin fs: fs in parallel mode. sda : sda in serial mode. 9 dir-sdti input of ak4145?s sdti open : port2. sdti : dir. 10 dir-lrck input of ak4145?s lrck open : port2. short : dir. 2008/08 - 3 -
[AKD4145-A] 11 dir-bick input of ak4145?s bick open : port2. short : dir. 12 dir-mclk input of ak4145?s mclk open : port2. short : dir. 13 avdd-sel power supply of ak4145?s avdd reg(3.3v) : avdd is supplied from regulator (t1). tm : avdd is supplied from ?avdd? connector. 14 dvdd-sel power supply of ak4145?s dvdd reg(1.8v) : dvdd is supplied from regulator (t2). tm : dvdd is supplied from ?dvdd? connector. 15 tvdd-sel power supply of ak4145?s tvdd dvdd : tvdd is supplie d from dvdd. reg(3.3v) : tvdd is supplied from regulator (t1). tm : tvdd is supplied from ?tvdd? connector. 16 gnd analog gnd and digital gnd open : separated. short : common. 17 logic2-sel power supply of logic2 tvdd: logic2 is supplied from tvdd. tm : logic2 is supplied from ?logic2? connector. 18 logic1-sel power supply of logic1 reg(3.3v) : logic1 is supplied from regulator (t1). tm : logic1 is supplied from ?logic1? connector. 22 5v-reg power supply of regulator (t1) open : it is supplied from ?reg-5v? connector. short : it is supplied from regulator (t3). 23 3.3v-reg power supply of regulator (t2) reg(3.3v) : it is supplied from regulator (t3). tm : it is supplied from ?reg-5v? connector. table. 2 setting of jumper pins 2008/08 - 4 -
[AKD4145-A] ? evaluation mode control mode the supporting control mode is as follows. 1. parallel mode 2. serial mode 1. parallel mode (1-1) set up the jumper pins. jp8 fs/sda sd a fs jp7 scl/dif dif scl jp1 serial (1-2) set up the dip sw (s3). s3 dif ( audio i/f ) fs ( sampling rate ) l 24bit msb justified 32khz h 16/24bit i 2 s compatible 48khz table. 3 setting of ak4145?s parallel mode 2. serial mode (2-1) set up the jumper pins. jp8 fs/sda sd a fs jp7 scl/dif dif scl jp1 serial (2-2) connect of the 10 wire flat cable. the ak4145 can be controlled via the printer port (par allel port) of ibm-at compatible pc. connect port3 (ctrl) with pc by 10 wire flat cable packed with the akd4145. port3 up i/f 6 5 10 1 nc cdto cdti ccl k csn gnd gnd gnd gnd gnd red figure. 2 connect of 10 wire flat cable 2008/08 - 5 -
[AKD4145-A] measurement mode the supporting measurement mode is as follows. 1. evaluation using dir of ak4114 2. evaluation using adc of ak5357 3. all interface signals are fed externally 1. evaluation using dir of ak4114 measurement path : optical connector (port1) or bnc (j6) dir (ak4114) ak4145 please supply biphase signal to optical connector (port1) or bnc connect or (j6). dir generates mclk, bick, lrck, and sdti from received data. (1-1) set up the jumper pins. jp6 (rx) should be set according to the rx input. follow is setting example in optical connector. jp9 dir-sdti bn c opt jp6 rx jp10 dir-lrck jp11 dir-bick jp12 dir-mclk (1-2) set up the dip sw (s2). in case of the ak4145 evaluation using the ak4114, it is necessary to correspond to the audio interface format for ak4145 (sdti) and ak4114 (sdto). about ak4145?s audio interface format, refer to datasheet of ak4145. about ak4114?s audio interface format, refer to table. 6 on page 8. (note) ak4145?s default setting of audio interface format is i 2 s compatible in parallel mode. dif0 l s2 dir-setting h dif1 dif2 ocks1 cm0 2008/08 - 6 -
[AKD4145-A] 2. evaluation using adc of ak5357 measurement path : ainl(j3) / ainr (j2) adc (ak5357) dir (ak4114) ak4145 please supply analog signal to ainl (j3) / ainr (j2). dir generates mclk, bick, lrck, and sdti from received data via ak5357?s adc. x?ta l (12.288mhz) on the board is used as ak4114?s reference clock. (2-1) set up the jumper pins. jp4 is setting of ak5357?s audio in terface format. in case of the ak535 7 evaluation using the ak4114, it is necessary to correspond to the audio interface format for ak5357 (sdto) and ak4114 (daux). about ak5357?s audio inte rface format, refer to table. 4 on this page. about ak4114?s audio interface format, refer to table. 6 on page 8. (note) ak5357?s default setting of audio interface format is i 2 s compatible. jp4 i2s open 24bit msb justified short i 2 s compatible table. 4 adc output audio interface format setting (2-2) set up the dip sw (s2). in case of the ak4145 evaluation using the ak4114, it is necessary to correspond to the audio interface format for ak4145 (sdti) and ak4114 (sdto). about ak4145?s audio interface format, refer to datasheet of ak4145. about ak4114?s audio interface format, refer to table. 6 on page 8. (note) ak4145?s default setting of audio interface format is i 2 s compatible in parallel mode. 3. all interface signals are fed externally measurement path : port2 ak4145 please supply mclk, bick, l rck and sdti to port2. (3-1) set up the jumper pins. jp9 dir-sdti bn c opt jp6 rx jp10 dir-lrck jp11 dir-bick jp12 dir-mclk jp4 i2s dif0 l s2 dir-setting h dif1 dif2 ocks1 cm0 jp9 dir-sdti jp10 dir-lrck jp11 dir-bick jp12 dir-mclk 2008/08 - 7 -
[AKD4145-A] ? setting of dip sw no. name on (?h?) off (?l?) default 1 dif0 h table. 5 ak4114 mode setting dif2 dif1 dif0 daux sdto lrck bick 0 0 0 24bit, left justified 16bit, right justified h/l 64fs 0 0 1 24bit, left justified 18bit, right justified h/l 64fs 0 1 0 24bit, left justified 20bit, right justified h/l 64fs 0 1 1 24bit, left justified 24bit, right justified h/l 64fs 1 0 0 24bit, left justified 24bit, left justified h/l 64fs 1 0 1 24bit, i 2 s 24bit, i 2 s l/h 64fs table. 6 ak4114 audio data format ocks1 mcko1 l 256fs h 512fs table. 7 ak4114 master clock output frequency cm0 pll clock souce sdto l on pll rx h off x?tal daux table. 8 ak4114 clock operation mode 2 dif1 l 3 dif2 output audio interface format : refer to table. 6 h 4 ocks1 master clock frequency setting : refer to table. 7 l 5 cm0 clock mode setting : refer to table. 8 l 2008/08 - 8 -
[AKD4145-A] ? baseband composite audio signal output circuit thr c57 0.1u + c58 22u + c56 10u vr1 50k 1 3 2 amp c59 0.1u r37 47k 12v + c60 10u r38 47k baseband composite audio c3 22u jp3 ca r36 10k u10 njm4580 aout 1 +vp 8 -ain 2 bout 7 +ain 3 -vp 4 -bin 6 +bin 5 jp2 amp c4 open r46 47k r2 220 j4 ca figure. 3 baseband composite audio signal output circuit 1. in case of amplification using the op-amp. the stereo separation can be maximized by adjusting the variable resistor (vr1). the jumper pins should be set as follows. jp2 amp jp3 ca amp thr 2. in case of through. this mode is out of use. 2008/08 - 9 -
[AKD4145-A] control software manual ? set-up of evaluation board and control software 1. set up the AKD4145-A according to previous term. 2. connect ibm-at compatible pc with AKD4145-A by 10-line type flat cable (packed with AKD4145-A). take care of the direction of 10pin header. (please in stall the driver in the cd-rom when this control software is used on windows 2000/xp. please refer ?installation manual of control software driver by akm device control software?. in case of windows95/98/me, this inst allation is not needed. this control software does not operate on windows nt.) 3. insert the cd-rom labeled ?ak4145-a evaluation kit? into the cd-rom drive. 4. access the cd-rom drive and double-click the icon of ?akd4145.exe? to set up the control program. 5. then please evaluate according to the follows. ? operation flow keep the following flow. 1. set up the control progra m according to explanation above. 2. click ?port reset? button. 3. click ?write default? button ? explanation of each buttons [port reset] : set up the us b interface board (akdusbif-a) . [write default] : initialize the register of ak4145. [all write] : write all register s that is currently displayed. [all read] : read all registers of the ak4145. [function1] : dialog to write data by keyboard operation. [function2] : dialog to write data by keyboard operation. [function3] : the sequence of regi ster setting can be set and executed. [function4] : the sequence that is created on [function3] can be assigned to buttons and executed. [function5]: the register setting that is created by [save] function on main window can be assigned to buttons and executed. [save] : save the current register setting. [open] : write the saved values to all register. [write] : dialog to write data by mouse operation. [read]: dialog to read data by mouse operation. ? indication of data input data is indicated on the register map. red letter indicates ?h? or ?1? and blue one indicates ?l? or ?0?. blank is the part that is not defined in the datasheet. 2008/08 - 10 -
[AKD4145-A] ? explanation of each dialog 1. [write dialog] : dialog to write data by mouse operation there are dialogs corresp onding to each register. click the [write] button corresponding to each register to set up the dialog. if you check the check box, data becomes ?h? or ?1?. if not, ?l? or ?0?. if you want to write the input data to ak4145, click [ok] button. if not, click [cancel] button. 2. [function1 dialog] : dialog to write data by keyboard operation address box: input registers address in 2 figures of hexadecimal. data box: input registers data in 2 figures of hexadecimal. if you want to write the input data to ak4145, click [ok] button. if not, click [cancel] button. 3. [function2 dialog] : dialog to evaluate dvol address box: input registers address in 2 figures of hexadecimal. start data box: input starts data in 2 figures of hexadecimal. end data box: input end data in 2 figures of hexadecimal. interval box: data is written to ak4145 by this interval. step box: data changes by this step. mode select box: if you check this check box, data reaches end data, and returns to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 if you do not check this check box, data reaches end data, but does not return to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 if you want to write the input data to ak4145, click [ok] button. if not, click [cancel] button. 2008/08 - 11 -
[AKD4145-A] 4. [save] and [open] 4-1. [save] save the current register setting data . the extension of file name is ?akr?. (1) click [save] button. (2) set the file name and push [save] button. the extension of file name is ?akr?. 4-2. [open] the register setting data saved by [save] is writte n to ak4145. the file type is the same as [save]. (1) click [open] button. (2) select the file (*.akr) and click [open] button. 2008/08 - 12 -
[AKD4145-A] 5. [function3 dialog] the sequence of register setting can be set and executed. (1) click [f3] button. (2) set the control sequence. set the address, data and interval time. set ?-1? to the address of the step where the sequence should be paused. (3) click [start] button. then this sequence is executed. the sequence is paused at the step of interval="-1". click [start] button, the sequence restarts from the paused step. this sequence can be saved and opened by [save] and [open] button on the function3 window. the extension of file name is ?aks?. figure. 4 window of [f3] 2008/08 - 13 -
[AKD4145-A] 6. [function4 dialog] the sequence that is created on [function3] can be assigned to buttons and executed. when [f4] button is clicked, the window as shown in figure. 5 opens. figure. 5 [f4] window 2008/08 - 14 -
[AKD4145-A] 6-1. [open] buttons on left side and [start] buttons (1) click [open] button and se lect the sequence file (*.aks). the sequence file name is displayed as shown in figure. 6 figure. 6 [f4] window (2) (2) click [start] button, then the sequence is executed. 6-2. [save] and [open] buttons on right side [save] : the sequence file names can assign be saved. the file name is *.ak4. [open] : the sequence file names assign that are saved in *.ak4 are loaded. 6-3. note (1) this function doesn't support the pause function of sequence function. (2) all files need to be in same folder us ed by [save] and [open] function on right side. (3) when the sequence is changed in [function3], the file should be loaded again in order to reflect the change. 2008/08 - 15 -
[AKD4145-A] 7. [function5 dialog] the register setting that is created by [save] function on main window can be assigned to buttons and executed. when [f5] button is clicked, the following window as shown in figure. 7 opens. figure. 7 [f5] window 7-1. [open] buttons on left side and [write] button ( 1) click [open] button and select the register setting file (*.akr). the register setting file name is displayed as shown in figure. 8 (2) click [write] button, then the register setting is executed. 2008/08 - 16 -
[AKD4145-A] figure. 8 [f5] windows(2) 7-2. [save] and [open] buttons on right side [save] : the register setting file names assign can be saved. the file name is *.ak5 . [open] : the register setting file names assign that are saved in *.ak5 are loaded. 7-3. note (1) all files need to be in same folder us ed by [save] and [open] function on right side. (2) when the register setting is changed by [save] button in main window, the file should be loaded again in order to reflect the change. 2008/08 - 17 -
[AKD4145-A] measurement results [measurement condition] ? measurement unit : audio pr ecision, system two cascade belar tv digital setereo monitor tvm-230 ? mclk : 256fs ? bick : 64fs ? fs : 48khz ? bit : 24bit ? power supply : avdd = tvdd = 3.3v, dvdd = 1.8v ? temperature : room [measurement results] parameter result (lch / rch) unit mono -79.5 s/(n+d) ( ? 1db input, 1khz) stereo -77.9 / -78.5 db mono -80.9 s/n (input off, a-weighting) stereo -81.3 / -81.3 db stereo separation stereo 49.4 / 48.5 db (-1db input, 1khz) [performance plots] stereo : figure. 9 : thd+n vs. input level (1khz) figure. 10 : thd+n vs. input frequency (-15db) figure. 11 : linearity (1khz) figure. 12 : frequency response (-15db) figure. 13 : separation (left channel = off, right channel = -15db) figure. 14 : fft plot (-1db) figure. 15 : fft plot (no signal) mono : figure. 16 : thd+n vs. input level (1khz) figure. 17 : thd+n vs. input frequency (-15db) figure. 18 : linearity (1khz) figure. 19 : frequency response (-15db) figure. 20 : fft plot (-1db) figure. 21 : fft plot (no signal) < km090003> 2008/08 - 18 -
[AKD4145-A] [stereo] thd + n vs input level -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr figure. 9 stereo mode thd + n vs. input level (fin=1khz) thd + n vs input frequency -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 10k 50 100 200 500 1k 2k 5k hz figure. 10 stereo mode thd + n vs. input frequency (-15db) < km090003> 2008/08 - 19 -
[AKD4145-A] linearity -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr figure. 11 stereo mode linearity (fin=1khz) a km frequency response -20 -10 -19 -18 -17 -16 -15 -14 -13 -12 -11 d b r a 20 10k 50 100 200 500 1k 2k 5k hz figure. 12 stereo mode frequency response (-15db) < km090003> 2008/08 - 20 -
[AKD4145-A] a km stereo separation (lch off, rch -15db) -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 10k 50 100 200 500 1k 2k 5k hz figure. 13 stereo separation (lch off, rch -15db) fft (-1db) -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz figure. 14 stereo mode fft plot (-1db) < km090003> 2008/08 - 21 -
[AKD4145-A] fft (no signal) -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz figure. 15 stereo mode fft plot (no signal) < km090003> 2008/08 - 22 -
[AKD4145-A] [mono] thd + n vs input level -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr figure. 16 mono mode thd + n vs. input level (fin=1khz) thd + n vs input frequency -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 10k 50 100 200 500 1k 2k 5k hz figure. 17 mono mode thd + n vs. input frequency (-15db) < km090003> 2008/08 - 23 -
[AKD4145-A] linearity -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr figure. 18 mono mode linearity (fin=1khz) a km frequency response -20 -10 -19 -18 -17 -16 -15 -14 -13 -12 -11 d b r a 20 10k 50 100 200 500 1k 2k 5k hz figure. 19 mono mode frequency response (-15db) < km090003> 2008/08 - 24 -
[AKD4145-A] fft (-1db) -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz figure. 20 mono mode fft plot (-1db) fft (no signal) -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz figure. 21 mono mode fft plot (no signal) < km090003> 2008/08 - 25 -
[AKD4145-A] revision history date manual board reason page contents (yy/mm/dd) revision revision 07/09/07 km090000 0 first edition 08/03/10 km090001 1 change device revision was changed. rev.a rev.b change 18-25 table data and plot data were changed. 08/06/05 km090002 2 change device revision was changed. rev.b rev.c change 18-25 table data and plot data were changed. important notice z these products and their specifications are subject to change without notice. when you consider any use or application of these product s, please make inquiries the sales office of asahi kasei emd corporation (akemd) or authorized distributors as to current status of the products. z akemd assumes no liability for infringement of any patent, in tellectual property, or other rights in the application or use of any information contained herein. z any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to cu stoms and tariffs, currency exchange, or strategic materials. z akemd products are neither intended nor authorized for use as critical components note1) in any safety, life support, or other hazard related device or system note2) , and akemd assumes no responsibility for such use, except for the use approved with the express written consent by re presentative director of akemd. as used here: note1) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medi cine, aerospace, nuclear energy, or other fi elds, in which its failure to function or perform may reasonably be expected to result in loss of life or in signifi cant injury or damage to person or property. z it is the responsibility of the buyer or distributor of ak emd products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akemd harmless from any and all claims arising from the use of sa id product in the absence of such notification. change 3-8 default setting of audio i/f was changed. msb justified i 2 s compatible 08/08/18 km090003 3 change 27 circuit diagram was changed. r47 was added. (p/s pin pull up) change 18-25 table data and plot data were changed. < km090003> 2008/08 - 26 -
a a b b c c d d e e e e d d c c b b a a adc-va ocks1 cm0 logic1 ocks1 cm0 logic1 logic2 4145-lrck 4145-sdti logic2 logic1 logic1 logic2 logic1 adc-va logic2 logic2 xti xto logic1 xti xto 4145-bick 4145-mclk logic1 avdd dvdd tvdd 4145-mclk 4145-lrck 4145-bick 4145-sdti logic1 dir-avdd 12v tvdd title size document number rev date: sheet of main 3 AKD4145-A a2 1 2 monday, august 18, 2008 title size document number rev date: sheet of main 3 AKD4145-A a2 1 2 monday, august 18, 2008 title size document number rev date: sheet of main 3 AKD4145-A a2 1 2 monday, august 18, 2008 rx opt bnc dif0 dif1 dif2 ocks1 cm0 lrck mclk vcc sdti bick gnd gnd scl sda (ack) sda port dir h l dif fs fs dif lh h l dir port port dir dir port sda scl scl thr amp port1 torx141 port1 torx141 out 1 vcc 3 gnd 2 u10 njm4580 u10 njm4580 aout 1 -ain 2 +ain 3 -vp 4 +vp 8 bout 7 -bin 6 +bin 5 c17 0.1u c17 0.1u ak5357 u1 ak5357 u1 ainr 1 ainl 2 cks1 3 vcom 4 agnd 5 va 6 vd 7 dgnd 8 lrck 10 mclk 11 sclk 12 pdn 13 cks2 15 dif 14 cks0 16 sdto 9 c36 0.1u c36 0.1u + c58 22u + c58 22u + c30 10u + c30 10u u9 74lvc07 u9 74lvc07 1a 1 2a 3 3a 5 4a 9 5a 11 6a 13 vcc 14 gnd 7 1y 2 2y 4 3y 6 4y 8 5y 10 6y 12 c32 0.1u c32 0.1u sw3 pdn-dir sw3 pdn-dir 2 1 3 r19 10k r19 10k d1 hsu119 d1 hsu119 k a c16 0.1u c16 0.1u r38 47k r38 47k + c8 open + c8 open l1 47u l1 47u 1 2 r41 51 r41 51 c35 0.1u c35 0.1u j6 bnc rx j6 bnc rx c29 0.1u c29 0.1u r5 10k r5 10k r39 47k r39 47k r22 470 r22 470 c10 0.1u c10 0.1u j1 cv27m j1 cv27m + c26 10u + c26 10u r10 470 r10 470 + c6 10u + c6 10u c38 0.1u c38 0.1u d3 hsu119 d3 hsu119 k a r4 51 r4 51 c34 0.1u c34 0.1u r17 10k r17 10k c9 4.7n c9 4.7n c57 0.1u c57 0.1u r33 51 r33 51 u3 74hc14 u3 74hc14 1a 1 1y 2 2a 3 2y 4 3a 5 3y 6 vcc 14 gnd 7 4y 8 4a 9 5y 10 5a 11 6y 12 6a 13 r18 10k r18 10k c7 0.1u c7 0.1u r11 51 r11 51 c25 0.1u c25 0.1u r12 18k r12 18k + c5 0.47u + c5 0.47u c59 0.1u c59 0.1u r29 47k r29 47k + c22 0.47u + c22 0.47u 1035 dsp 1035 dsp 1 3 5 7 9 10 8 6 4 2 r9 51 r9 51 jp8 fs/sda jp8 fs/sda x1 12.288mhz x1 12.288mhz 1 2 rp2 47k rp2 47k 5 4 3 2 1 + c3 22u + c3 22u jp10 dir-lrck jp10 dir-lrck c14 0.1u c14 0.1u r14 10k r14 10k r16 10k r16 10k r21 470 r21 470 + c60 10u + c60 10u u8 74avc8t245 u8 74avc8t245 a1 3 a2 4 a3 5 a4 6 a5 7 a6 8 a7 9 a8 10 b1 21 b2 20 b3 19 b4 18 b5 17 b6 16 b7 15 b8 14 gnd 11 gnd 12 gnd 13 vcca 1 dir 2 vccb 24 vccb 23 oe 22 vr1 50k vr1 50k 1 3 2 r47 47k r47 47k r42 51 r42 51 r8 51 r8 51 r46 47k r46 47k led1 int led1 int k a c23 5p c23 5p c24 0.1u c24 0.1u cn2 16pin_r cn2 16pin_r 9 10 11 12 13 14 15 16 jp11 dir-bick jp11 dir-bick jp9 dir-sdti jp9 dir-sdti r3 5.1 r3 5.1 r15 1k r15 1k c21 5p c21 5p jp2 amp jp2 amp c12 0.1u c12 0.1u r7 51 r7 51 r43 51 r43 51 r30 47k r30 47k jp6 rx jp6 rx s2 dir-setting s2 dir-setting 1 2 3 4 5 10 9 8 7 6 c31 0.1u c31 0.1u r34 51 r34 51 c27 0.1u c27 0.1u r32 51 r32 51 ak4145 u2 ak4145 u2 filt 1 p/s 2 cv27m 3 pdn 4 mclk 5 lrck 6 bick 7 sdti 8 dif/scl 10 tvdd 11 dvdd 12 vss 13 avdd 15 vcom 14 ca 16 fs/sda 9 u5 74hc14 u5 74hc14 1a 1 1y 2 2a 3 2y 4 3a 5 3y 6 vcc 14 gnd 7 4y 8 4a 9 5y 10 5a 11 6y 12 6a 13 1035 ctrl 1035 ctrl 1 3 5 7 9 10 8 6 4 2 r2 220 r2 220 r44 51 r44 51 r40 100k r40 100k j2 ainr j2 ainr u7 74avc8t245 u7 74avc8t245 a1 3 a2 4 a3 5 a4 6 a5 7 a6 8 a7 9 a8 10 b1 21 b2 20 b3 19 b4 18 b5 17 b6 16 b7 15 b8 14 gnd 11 gnd 12 gnd 13 vcca 1 dir 2 vccb 24 vccb 23 oe 22 r37 47k r37 47k r1 75 r1 75 c15 0.1u c15 0.1u j4 ca j4 ca r13 75 r13 75 sw2 pdn-adc sw2 pdn-adc 2 1 3 r45 51 r45 51 jp4 i2s jp4 i2s + c1 10u + c1 10u r20 1k r20 1k + c13 10u + c13 10u jp7 dif/scl jp7 dif/scl c11 0.1u c11 0.1u + c33 10u + c33 10u j3 ainl j3 ainl jp1 serial jp1 serial cn1 16pin_l cn1 16pin_l 1 2 3 4 5 6 7 8 r36 10k r36 10k + c56 10u + c56 10u c37 0.1u c37 0.1u + c20 10u + c20 10u c4 open c4 open c19 0.1u c19 0.1u u4 ak4114 u4 ak4114 ips0/rx4 1 avss 2 dif0/rx5 3 test2 4 dif1/rx6 5 avss 6 dif2/rx7 7 ips1/iic 8 p/sn 9 xtl0 10 xtl1 11 vin 12 tvdd 13 dvss 14 tx0 15 tx1 16 bout 17 cout 18 uout 19 vout 20 dvdd 21 dvss 22 mcko1 23 lrck 24 sdto 25 bick 26 mcko2 27 daux 28 xto 29 xti 30 pdn 31 cm0/cdto 32 cm1/cdti 33 ocks1/cclk 34 ocks0/csn 35 int0 36 int1 37 avdd 38 r 39 vcom 40 avss 41 rx0 42 avss 43 rx1 44 test1 45 rx2 46 avss 47 rx3 48 r23 51 r23 51 sw1 pdn-4145 sw1 pdn-4145 2 1 3 c28 0.1u c28 0.1u s3 4145-pararel s3 4145-pararel 1 2 4 3 jp12 dir-mclk jp12 dir-mclk + c2 10u + c2 10u c18 0.1u c18 0.1u d2 hsu119 d2 hsu119 k a jp3 ca jp3 ca - 27 -
a a b b c c d d e e e e d d c c b b a a logic1 logic2 avdd dvdd tvdd adc-va 12v dir-avdd title size document number rev date: sheet of main-power supply 3 AKD4145-A a3 22 monday, august 18, 2008 title size document number rev date: sheet of main-power supply 3 AKD4145-A a3 22 monday, august 18, 2008 title size document number rev date: sheet of main-power supply 3 AKD4145-A a3 22 monday, august 18, 2008 5v-->3.3v reg(3.3v) tm reg(1.8v) tm reg(3.3v) tm dvdd tvdd tm tm reg(3.3v) 3.3v-->1.8v 12v-->5v reg(3.3v) tm jp15 tvdd-sel jp15 tvdd-sel t2 lt1963aest-1.8 t2 lt1963aest-1.8 in 1 gnd 2 out 3 c54 0.1u c54 0.1u jp18 logic1-sel jp18 logic1-sel jp14 dvdd-sel jp14 dvdd-sel l2 (short) l2 (short) 1 2 t1 ta48m033f t1 ta48m033f in 1 out 2 gnd 3 r27 (short) r27 (short) t3 njm78m05fa t3 njm78m05fa out 3 gnd 2 in 1 + c51 47u + c51 47u 1 2 avdd1 t45_or avdd1 t45_or 1 c41 0.1u c41 0.1u jp17 logic2-sel jp17 logic2-sel tvdd1 t45_or tvdd1 t45_or 1 c55 0.1u c55 0.1u jp22 5v-reg jp22 5v-reg jp16 gnd jp16 gnd r35 (short) r35 (short) c40 0.1u c40 0.1u r28 (short) r28 (short) + c47 47u + c47 47u 1 2 dgnd1 t45_bk dgnd1 t45_bk 1 r25 (short) r25 (short) agnd1 t45_bk agnd1 t45_bk 1 c45 0.1u c45 0.1u jp13 avdd-sel jp13 avdd-sel l3 (short) l3 (short) 1 2 r31 (short) r31 (short) + c50 47u + c50 47u 1 2 reg(12v)1 t45_red reg(12v)1 t45_red 1 + c42 47u + c42 47u 1 2 reg(5v)1 t45_red reg(5v)1 t45_red 1 c44 0.1u c44 0.1u r26 (short) r26 (short) jp23 3.3v-reg jp23 3.3v-reg logic1 t45_or logic1 t45_or 1 + c39 47u + c39 47u 1 2 l5 (short) l5 (short) 1 2 r24 (short) r24 (short) + c46 47u + c46 47u l4 (short) l4 (short) 1 2 + c43 47u + c43 47u + c52 47u + c52 47u + c48 47u + c48 47u 1 2 dvdd1 t45_or dvdd1 t45_or 1 logic2 t45_or logic2 t45_or 1 l6 (short) l6 (short) 1 2 + c53 47u + c53 47u + c49 47u + c49 47u 1 2 - 28 -
- 29 -
- 30 -
- 31 -
- 32 -

▲Up To Search▲

Price & Availability of AKD4145-A

	To Download AKD4145-A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .